
//-------NV3051F-L +BOE3.49 Initial-------------

Wrt_Reg_3052(0xFF,0x30);
Wrt_Reg_3052(0xFF,0x52);
Wrt_Reg_3052(0xFF,0x01);
Wrt_Reg_3052(0xE3,0x00);

Wrt_Reg_3052(0x25,0x10);
Wrt_Reg_3052(0x28,0x6F);
Wrt_Reg_3052(0x29,0x01);
Wrt_Reg_3052(0x2A,0xdf);
Wrt_Reg_3052(0x2C,0x22);
Wrt_Reg_3052(0xC3,0x0F);  
Wrt_Reg_3052(0x37,0x9C);
Wrt_Reg_3052(0x38,0xA7);
Wrt_Reg_3052(0x39,0x41);//VCOM
Wrt_Reg_3052(0x80,0x20);//2POWER
Wrt_Reg_3052(0x91,0x67);
Wrt_Reg_3052(0x92,0x67);
Wrt_Reg_3052(0xA0,0x55);
Wrt_Reg_3052(0xA1,0x50);
Wrt_Reg_3052(0xA3,0x58);
Wrt_Reg_3052(0xA4,0x9C);
Wrt_Reg_3052(0xA7,0x02);
Wrt_Reg_3052(0xA8,0x01);
Wrt_Reg_3052(0xA9,0x21);
Wrt_Reg_3052(0xAA,0xFC);  
Wrt_Reg_3052(0xAB,0x28);  
Wrt_Reg_3052(0xAC,0x06);  
Wrt_Reg_3052(0xAD,0x06);  
Wrt_Reg_3052(0xAE,0x06);  
Wrt_Reg_3052(0xAF,0x03);  
Wrt_Reg_3052(0xB0,0x08);  
Wrt_Reg_3052(0xB1,0x26);  
Wrt_Reg_3052(0xB2,0x28);  
Wrt_Reg_3052(0xB3,0x28);  
Wrt_Reg_3052(0xB4,0x03);  
Wrt_Reg_3052(0xB5,0x08);  
Wrt_Reg_3052(0xB6,0x26);  
Wrt_Reg_3052(0xB7,0x08);  
Wrt_Reg_3052(0xB8,0x26); 
Wrt_Reg_3052(0xC0,0x00);
Wrt_Reg_3052(0xC1,0x00);
Wrt_Reg_3052(0xC2,0x00);
Wrt_Reg_3052(0xFF,0x30);
Wrt_Reg_3052(0xFF,0x52);
Wrt_Reg_3052(0xFF,0x02);
Wrt_Reg_3052(0xB0,0x02);
Wrt_Reg_3052(0xD0,0x02);
Wrt_Reg_3052(0xB1,0x0f);
Wrt_Reg_3052(0xD1,0x10);
Wrt_Reg_3052(0xB2,0x11);
Wrt_Reg_3052(0xD2,0x12);
Wrt_Reg_3052(0xB3,0x32);
Wrt_Reg_3052(0xD3,0x33);
Wrt_Reg_3052(0xB4,0x36);
Wrt_Reg_3052(0xD4,0x36);
Wrt_Reg_3052(0xB5,0x3C);
Wrt_Reg_3052(0xD5,0x3C);
Wrt_Reg_3052(0xB6,0x20);
Wrt_Reg_3052(0xD6,0x20);
Wrt_Reg_3052(0xB7,0x3e);
Wrt_Reg_3052(0xD7,0x3e);
Wrt_Reg_3052(0xB8,0x0E);
Wrt_Reg_3052(0xD8,0x0d);
Wrt_Reg_3052(0xB9,0x05);
Wrt_Reg_3052(0xD9,0x05);
Wrt_Reg_3052(0xBA,0x11);
Wrt_Reg_3052(0xDA,0x12);
Wrt_Reg_3052(0xBB,0x11);
Wrt_Reg_3052(0xDB,0x11);
Wrt_Reg_3052(0xBC,0x13);
Wrt_Reg_3052(0xDC,0x14);
Wrt_Reg_3052(0xBD,0x14);
Wrt_Reg_3052(0xDD,0x14);
Wrt_Reg_3052(0xBE,0x16);
Wrt_Reg_3052(0xDE,0x18);
Wrt_Reg_3052(0xBF,0x0e);
Wrt_Reg_3052(0xDF,0x0f);
Wrt_Reg_3052(0xC0,0x17);
Wrt_Reg_3052(0xE0,0x17);
Wrt_Reg_3052(0xC1,0x07);
Wrt_Reg_3052(0xE1,0x08);
Wrt_Reg_3052(0xFF,0x30);
Wrt_Reg_3052(0xFF,0x52);
Wrt_Reg_3052(0xFF,0x03);
Wrt_Reg_3052(0x08,0x8A);
Wrt_Reg_3052(0x09,0x8B);
Wrt_Reg_3052(0x30,0x00);
Wrt_Reg_3052(0x31,0x00);
Wrt_Reg_3052(0x32,0x00);
Wrt_Reg_3052(0x33,0x00);
Wrt_Reg_3052(0x34,0x61);
Wrt_Reg_3052(0x35,0xD4);
Wrt_Reg_3052(0x36,0x24);
Wrt_Reg_3052(0x37,0x03);
Wrt_Reg_3052(0x40,0x86);
Wrt_Reg_3052(0x41,0x87);
Wrt_Reg_3052(0x42,0x84);
Wrt_Reg_3052(0x43,0x85);
Wrt_Reg_3052(0x44,0x11);
Wrt_Reg_3052(0x45,0xDE);
Wrt_Reg_3052(0x46,0xDD);
Wrt_Reg_3052(0x47,0x11);
Wrt_Reg_3052(0x48,0xE0);
Wrt_Reg_3052(0x49,0xDF);
Wrt_Reg_3052(0x50,0x82);
Wrt_Reg_3052(0x51,0x83);
Wrt_Reg_3052(0x52,0x80);
Wrt_Reg_3052(0x53,0x81);
Wrt_Reg_3052(0x54,0x11);
Wrt_Reg_3052(0x55,0xE2);
Wrt_Reg_3052(0x56,0xE1);
Wrt_Reg_3052(0x57,0x11);
Wrt_Reg_3052(0x58,0xE4);
Wrt_Reg_3052(0x59,0xE3);
Wrt_Reg_3052(0x82,0x0F);
Wrt_Reg_3052(0x83,0x0F);
Wrt_Reg_3052(0x84,0x00);
Wrt_Reg_3052(0x85,0x0F);
Wrt_Reg_3052(0x86,0x0F);
Wrt_Reg_3052(0x87,0x0E);
Wrt_Reg_3052(0x88,0x0E);
Wrt_Reg_3052(0x89,0x06);
Wrt_Reg_3052(0x8A,0x06);
Wrt_Reg_3052(0x8B,0x07);
Wrt_Reg_3052(0x8C,0x07);
Wrt_Reg_3052(0x8D,0x04);
Wrt_Reg_3052(0x8E,0x04);
Wrt_Reg_3052(0x8F,0x05);
Wrt_Reg_3052(0x90,0x05);
Wrt_Reg_3052(0x98,0x0F);
Wrt_Reg_3052(0x99,0x0F);
Wrt_Reg_3052(0x9A,0x00);
Wrt_Reg_3052(0x9B,0x0F);
Wrt_Reg_3052(0x9C,0x0F);
Wrt_Reg_3052(0x9D,0x0E);
Wrt_Reg_3052(0x9E,0x0E);
Wrt_Reg_3052(0x9F,0x06);
Wrt_Reg_3052(0xA0,0x06);
Wrt_Reg_3052(0xA1,0x07);
Wrt_Reg_3052(0xA2,0x07);
Wrt_Reg_3052(0xA3,0x04);
Wrt_Reg_3052(0xA4,0x04);
Wrt_Reg_3052(0xA5,0x05);
Wrt_Reg_3052(0xA6,0x05);
Wrt_Reg_3052(0xE0,0x02);
Wrt_Reg_3052(0xE1,0x52);
Wrt_Reg_3052(0xFF,0x30);
Wrt_Reg_3052(0xFF,0x52);
Wrt_Reg_3052(0xFF,0x00);  
Wrt_Reg_3052(0x36,0x02);
Wrt_Reg_3052(0x11,0x00);
Delay_ms(200);
Wrt_Reg_3052(0x29,0x00);
Delay_ms(100);